This IP describes a general purpose Analog to Digital Converter (ADC) for low-power applications. The converter is a charge-redistribution successive-approximation type converter, and it is suitable to operate in a time-interleaved ADC to enable higher sample-rates. As an example, this ADC is applied in a 2.5 GS/s ADC system. The key feature of this ADC is its low power consumption. Next to this, the full-scale range is programmable and its area is small. The IP product described in the datasheet is silicon proven. The 2.5 GS/s ADC system in which this ADC is applied fulfills all mass-production consumer electronics requirements.

The functional block diagram of the 37.5MS/s ADC is shown below.